• Snapboard
  • Activity
  • Reports
  • Campaign
Welcome ,

Chat with the recruiter

...Minimize

Hey I'm Online! Leave me a message.
Let me know if you have any questions.

Hardware Test Engineer

In United States

Save this job

Hardware Test Engineer   

Click on the below icons to share this job to Linkedin, Twitter!

JOB TITLE:

Hardware Test Engineer

JOB TYPE:

JOB SKILLS:

JOB LOCATION:

San Diego, CA United States

JOB DESCRIPTION:

Position – Hardware Security System Test Engineer San Diego, CA Experience: 5 - 8 yrs +   General Summary what is role: Looking for an engineer to work on leading edge technology chips. Works with Security Architecture Team, Crypto teams, and IT to come up with solutions to complex security issues in large scale end to end chip manufacturing. This will include securely provisioning, tracking, and configuring or SKU-ing the chips to meet market demand while ensuring security is not compromised. As well as ensuring any life cycle state (LCS) transitions are done correctly and in accordance with manufacturing flow. Working with various global teams (designers, DTF, DV, software teams, program management and other engineers) to define fusing requirements and create a test plan prior to chip tape out. Work in high pressure scenarios to ensure quick bring up once Silicon is on deck to ensure parts are distributed to various teams in time. Work on 93K and Teradyne platforms to develop test programs in Java and VB that are scalable and tested extensively before deploying to production Validate chip functionality and debugging any chip or yield issues with design. Preparing the test program for mass production through reviews and test time reduction. Work with MBIST teams to ensure memory repair is brought up correctly to increase yield. Chip security provisioning via CM and TME cores Communicate with cross functional teams to own and ensure fuse quality on all chips and provide solutions to ensure this across Mobile, IOT, Automotive, Compute and Server chips. Must be able to plan and execute an ATE test program from start to finish, on time, under (test time) budget, while also innovating to help our global team excel. Must work well in a team environment, but also be self-driven to complete tasks without supervision. Fusing is a destructive process, so attention to detail is a must.   Minimum Qualifications: • Bachelor's degree in Computer Science, Engineering, Information Systems, or related field and 7+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Engineering, Information Systems, or related field and 6+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Engineering, Information Systems, or related field and 5+ years of Hardware Engineering or related work experience.     Engineering requirements:   3+ years of relevant experience on ATE and Test Methodologies. Experience with Advantest 93K preferred Experienced in Object oriented programming languages (Java, C++). Able to write Java code for basic ATE functionality/measurements Proficient with Unix/Linux. Scripting experience with Perl/Python preferred. Familiarity with basic ATE test methodology including Boundary Scan, ATPG, MBIST and test protocols such as TIC, JTAG. SVN/GIT or other version control Clear communication skills, ability to work with many teams to gather requirements and debug issues Attention to detail Ability to multitask and prioritize effectively

Position Details

POSTED:

Nov 23, 2022

EMPLOYMENT:

INDUSTRY:

SNAPRECRUIT ID:

S16554240290381530

LOCATION:

United States

CITY:

San Diego, CA

Job Origin:

OORWIN_ORGANIC_FEED

A job sourcing event
In Dallas Fort Worth
Aug 19, 2017 9am-6pm
All job seekers welcome!

Hardware Test Engineer    Apply

Click on the below icons to share this job to Linkedin, Twitter!

Position – Hardware Security System Test Engineer San Diego, CA Experience: 5 - 8 yrs +   General Summary what is role: Looking for an engineer to work on leading edge technology chips. Works with Security Architecture Team, Crypto teams, and IT to come up with solutions to complex security issues in large scale end to end chip manufacturing. This will include securely provisioning, tracking, and configuring or SKU-ing the chips to meet market demand while ensuring security is not compromised. As well as ensuring any life cycle state (LCS) transitions are done correctly and in accordance with manufacturing flow. Working with various global teams (designers, DTF, DV, software teams, program management and other engineers) to define fusing requirements and create a test plan prior to chip tape out. Work in high pressure scenarios to ensure quick bring up once Silicon is on deck to ensure parts are distributed to various teams in time. Work on 93K and Teradyne platforms to develop test programs in Java and VB that are scalable and tested extensively before deploying to production Validate chip functionality and debugging any chip or yield issues with design. Preparing the test program for mass production through reviews and test time reduction. Work with MBIST teams to ensure memory repair is brought up correctly to increase yield. Chip security provisioning via CM and TME cores Communicate with cross functional teams to own and ensure fuse quality on all chips and provide solutions to ensure this across Mobile, IOT, Automotive, Compute and Server chips. Must be able to plan and execute an ATE test program from start to finish, on time, under (test time) budget, while also innovating to help our global team excel. Must work well in a team environment, but also be self-driven to complete tasks without supervision. Fusing is a destructive process, so attention to detail is a must.   Minimum Qualifications: • Bachelor's degree in Computer Science, Engineering, Information Systems, or related field and 7+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Engineering, Information Systems, or related field and 6+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Engineering, Information Systems, or related field and 5+ years of Hardware Engineering or related work experience.     Engineering requirements:   3+ years of relevant experience on ATE and Test Methodologies. Experience with Advantest 93K preferred Experienced in Object oriented programming languages (Java, C++). Able to write Java code for basic ATE functionality/measurements Proficient with Unix/Linux. Scripting experience with Perl/Python preferred. Familiarity with basic ATE test methodology including Boundary Scan, ATPG, MBIST and test protocols such as TIC, JTAG. SVN/GIT or other version control Clear communication skills, ability to work with many teams to gather requirements and debug issues Attention to detail Ability to multitask and prioritize effectively


Please wait..!!