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Remote Job for Graphics IP Hardware Design Engineer

In Florida / United States

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Remote Job for Graphics IP Hardware Design Engineer   

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JOB TITLE:

Remote Job for Graphics IP Hardware Design Engineer

JOB TYPE:

JOB SKILLS:

JOB LOCATION:

Orlando Florida / United States

JOB DESCRIPTION:

Job Title : Graphics IP Hardware Design Engineer"

Location : Remote (Easter Time Zone is preferred)

Duration: 12 Months

THE ROLE:
The focus of the role is owning and creating complex circuitry in RTL for development of AMD's graphics processor unit (GPU) resulting in a fast, low power, efficient, best in class ASIC.

THE PERSON:
An analytical thinker with problem-solving skills and excellent attention to detail
Possesses excellent comprehension, communication, and interpersonal skills
Enjoys working in a fast-paced, multi-project team environment using state of the art tools and technology

KEY RESPONSIBILITIES:
Collaborate with system and IP level architects to understand the features to be implemented and document the low-level hardware architecture
Create design documentation, accounting for interactions with other features and the existing hardware system, both your block and the neighboring blocks
Implement the design in Verilog or System Verilog, ensuring adherence to our RTL coding guidelines
Creating a design that has high-performance, low power, minimum area, and can execute with a very high clock frequency
Improve existing designs to improve performance and clock frequency, while reducing area and power
Run and analyze reports and resolve issues from: linting, timing, synthesis, and formal verification.
Assist debugging test failures in both simulation, emulation, and silicon environments
Create SystemVerilog coverpoints and assertions to allow verification and full functional coverage of your code. Review code coverage, and work with DV to achieve code coverage closure.

PREFERRED EXPERIENCE:
Having ~10 years of ASIC design experience
Proficient in writing efficient RTL code in Verilog and System Verilog including use of a source control system and RTL linting tools
Proficient in debugging RTL code using simulation tools, including the ability to determine if the root cause of a failing test is the firmware, hardware, or test issue
Engineering tools experience with VCS, Spyglass, DC, and Formality
Experience in Graphics IP pipeline is a plus
ACADEMIC CREDENTIALS:
BS degree in Electrical or Computer Engineering
MS degree preferred

*U.S. remote working, Easter Time Zone is preferred

Position Details

POSTED:

Aug 18, 2021

EMPLOYMENT:

INDUSTRY:

SNAPRECRUIT ID:

S1620486299252591

LOCATION:

Florida / United States

CITY:

Orlando

Job Origin:

CEIPAL_ORGANIC_FEED

A job sourcing event
In Dallas Fort Worth
Aug 19, 2017 9am-6pm
All job seekers welcome!

Remote Job for Graphics IP Hardware Design Engineer    Apply

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Job Title : Graphics IP Hardware Design Engineer"

Location : Remote (Easter Time Zone is preferred)

Duration: 12 Months

THE ROLE:
The focus of the role is owning and creating complex circuitry in RTL for development of AMD's graphics processor unit (GPU) resulting in a fast, low power, efficient, best in class ASIC.

THE PERSON:
An analytical thinker with problem-solving skills and excellent attention to detail
Possesses excellent comprehension, communication, and interpersonal skills
Enjoys working in a fast-paced, multi-project team environment using state of the art tools and technology

KEY RESPONSIBILITIES:
Collaborate with system and IP level architects to understand the features to be implemented and document the low-level hardware architecture
Create design documentation, accounting for interactions with other features and the existing hardware system, both your block and the neighboring blocks
Implement the design in Verilog or System Verilog, ensuring adherence to our RTL coding guidelines
Creating a design that has high-performance, low power, minimum area, and can execute with a very high clock frequency
Improve existing designs to improve performance and clock frequency, while reducing area and power
Run and analyze reports and resolve issues from: linting, timing, synthesis, and formal verification.
Assist debugging test failures in both simulation, emulation, and silicon environments
Create SystemVerilog coverpoints and assertions to allow verification and full functional coverage of your code. Review code coverage, and work with DV to achieve code coverage closure.

PREFERRED EXPERIENCE:
Having ~10 years of ASIC design experience
Proficient in writing efficient RTL code in Verilog and System Verilog including use of a source control system and RTL linting tools
Proficient in debugging RTL code using simulation tools, including the ability to determine if the root cause of a failing test is the firmware, hardware, or test issue
Engineering tools experience with VCS, Spyglass, DC, and Formality
Experience in Graphics IP pipeline is a plus
ACADEMIC CREDENTIALS:
BS degree in Electrical or Computer Engineering
MS degree preferred

*U.S. remote working, Easter Time Zone is preferred


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