ASIC Design Engineer This is an exciting opportunity for an ASIC Design Engineer to join a fast-growing semiconductor and IP provider specializing in physical layer solutions for advanced wireless communications. With a strong focus on 5G and future wireless standards, it develops cutting-edge channel coding and signal processing technologies that enhance network performance by improving spectral efficiency, latency, and energy consumption. As an ASIC Design Engineer, you will work on the latest generation space qualified devices, delivering standalone IP, and IP integration, with potential to explore implementation on AI Engines. Key ResponsibilitiesWork closely with the Algorithm team to understand requirements and translate them into architectures for RTL implementations.Implement designs targeting both FPGA and ASIC using industry standard techniques, including the creation of UVM based testbenches.Actively engage with and adhere to engineering methodology, processes and design techniques, being able to offer improvements to efficiency and quality for both the design flow and the final product. Required skills:Knowledge of an RTL language (Verilog, SystemVerilog) for complex ASIC/FPGA productsA strong skillset in delivering digital designs in the ASIC and FPGA industry Optimisation of timing and hardware resources for high throughput data or signal processing applications. Experience in power management techniques, synthesis and timing analysisFamiliar with the AMBA bus protocolUnderstanding of UVM verification techniques or practical experience using UVM for IP verification. This is a hybrid working role and you must be able to work onsite 2-3 days per week. For more info, please contact Rachel Mason at IC Resources.