CPU Design Verification Engineer - CPU DV / Microprocessor Verification / SystemVerilog / UVMWe are partnered with a global semiconductor company with a major engineering presence in Cambridge. They are looking for a CPU Design Verification Engineer to work on high performance CPU and SoC products across a broad range of markets including CPUs, GPUs, ultra low power IoT, and wearable devices.In this role, you will work closely with Chip Architects to validate CPU and SoC level microarchitecture concepts and ensure designs are fully verified and launch ready for end products.You will be involved early in the development lifecycle and have real influence on verification strategy, methodology, and overall design quality.What You Will Be Doing:Working with CPU and SoC Architects to understand architectural concepts and high level system requirementsDeveloping detailed test plans and coverage plans based on architecture and microarchitecture specificationsDefining and developing scalable and portable verification methodologiesBuilding complete verification environments including stimulus, checkers, assertions, trackers, and coverageDeveloping verification plans and testbenches for assigned functional domainsExecuting verification plans including design bring up, DV environment bring up, regressions, feature enablement, and debug of failuresTracking and reporting DV progress using metrics such as coverage and bug statusWhat We Are Looking For:Strong knowledge of CPU and microprocessor verification and architectures, with experience in areas such as cache coherence, memory ordering and consistency, prefetching, branch prediction, renaming, speculative execution, and address translation or memory managementExperience with random instruction sequencing and block, subsystem, and chip level verificationExperience leading or mentoring a small team of verification engineersExposure to advanced verification techniques such as formal verification, assertions, and silicon bring upIn depth understanding of microprocessor functions, architectures, and microarchitecturesExperience writing test plans, portable testbenches, transactors, and assembly codeHands on experience with verification tools and methodologies including simulators, coverage, gate level simulation, waveform viewers, and formal toolsLocation RequirementThis role requires 5 days per week onsite in our client’s Cambridge office.If this sounds interesting and you'd like to learn more, click the link below to apply or email me with a copy of your CV on By applying to this role you understand that we may collect your personal data and store and process it on our systems. For more information please see our Privacy Notice (