image
  • Snapboard
  • Activity
  • Reports
  • Campaign
Welcome ,
loadingbar
Loading, Please wait..!!

Design Verification Engineer

  • ... Posted on: Apr 01, 2026
  • ... IC Resources
  • ... Edinburgh, Indiana
  • ... Salary: Not Available
  • ... Full-time

Design Verification Engineer   

Job Title :

Design Verification Engineer

Job Type :

Full-time

Job Location :

Edinburgh Indiana United States

Remote :

No

Jobcon Logo Job Description :

Senior Verification EngineerEdinburgh, UKAre you an experienced Verification Engineer looking for your next challenge? Do you have a passion for ASIC/FPGA verification and want to work on cutting-edge technology? If so, this is an exciting opportunity to join a company transforming global mobile connectivity.You will play a key role in the verification of next-generation chipsets for satellite communication, enabling global mobile coverage. The team has already demonstrated proof of concept for 5G calling and WiFi, and is now scaling towards full product development.This is a growing UK team and so experience levels can range between 5 years through to 30! Key ResponsibilitiesVerification Execution: Develop and execute robust verification plans to ensure designs meet system requirements and specifications.Testbench Development: Build and enhance scalable verification environments, including stimulus, monitors, and checkers.Methodology: Apply modern verification methodologies (UVM) to drive high-quality, reusable verification solutions.Coverage & Debug: Drive coverage closure and debug complex issues across simulation environments.Collaboration: Work closely with System, FPGA, and IC Design teams to identify and resolve issues early in the design cycle.IP Integration: Support verification of third-party IP and ensure compliance with design and verification requirements.Minimum QualificationsProven experience verifying complex SoC or subsystem-level designs.Strong background in DSP, wireless communication, or networking systems.Hands-on experience with Verilog, SystemVerilog, UVM, and/or VHDL.Solid understanding of verification methodologies, coverage, and debugging techniques.Experience with scripting languages such as Python, Tcl, Perl, or similar.Strong communication skills and ability to work effectively in cross-functional teams.Additional InformationThis is an on-site role based in Edinburgh, UK.Candidates must have UK working rights.You will be joining a fast-growing start-up environment, working on highly innovative technology.Opportunity to collaborate with leading global telecom companies.Competitive base salary plus equity If you're excited about working at the forefront of mobile and satellite communication technology, I’d love to hear from you.To apply or for more information, contact Rachel Mason at IC Resources.

View Full Description

Jobcon Logo Position Details

Posted:

Apr 01, 2026

Reference Number:

19584_4393588322

Employment:

Full-time

Salary:

Not Available

City:

Edinburgh

Job Origin:

APPCAST_CPC

Share this job:

  • linkedin

Jobcon Logo
A job sourcing event
In Dallas Fort Worth
Aug 19, 2017 9am-6pm
All job seekers welcome!

Design Verification Engineer    Apply

Click on the below icons to share this job to Linkedin, Twitter!

Senior Verification EngineerEdinburgh, UKAre you an experienced Verification Engineer looking for your next challenge? Do you have a passion for ASIC/FPGA verification and want to work on cutting-edge technology? If so, this is an exciting opportunity to join a company transforming global mobile connectivity.You will play a key role in the verification of next-generation chipsets for satellite communication, enabling global mobile coverage. The team has already demonstrated proof of concept for 5G calling and WiFi, and is now scaling towards full product development.This is a growing UK team and so experience levels can range between 5 years through to 30! Key ResponsibilitiesVerification Execution: Develop and execute robust verification plans to ensure designs meet system requirements and specifications.Testbench Development: Build and enhance scalable verification environments, including stimulus, monitors, and checkers.Methodology: Apply modern verification methodologies (UVM) to drive high-quality, reusable verification solutions.Coverage & Debug: Drive coverage closure and debug complex issues across simulation environments.Collaboration: Work closely with System, FPGA, and IC Design teams to identify and resolve issues early in the design cycle.IP Integration: Support verification of third-party IP and ensure compliance with design and verification requirements.Minimum QualificationsProven experience verifying complex SoC or subsystem-level designs.Strong background in DSP, wireless communication, or networking systems.Hands-on experience with Verilog, SystemVerilog, UVM, and/or VHDL.Solid understanding of verification methodologies, coverage, and debugging techniques.Experience with scripting languages such as Python, Tcl, Perl, or similar.Strong communication skills and ability to work effectively in cross-functional teams.Additional InformationThis is an on-site role based in Edinburgh, UK.Candidates must have UK working rights.You will be joining a fast-growing start-up environment, working on highly innovative technology.Opportunity to collaborate with leading global telecom companies.Competitive base salary plus equity If you're excited about working at the forefront of mobile and satellite communication technology, I’d love to hear from you.To apply or for more information, contact Rachel Mason at IC Resources.

Loading
Please wait..!!