Join a world-class semiconductor powerhouse and play a key role in cutting-edge ASIC development.I am looking for a Senior Design Verification Engineer to join a dynamic hardware development team in Edinburgh. In this role, you’ll be responsible for ensuring the functional correctness and robustness of complex digital and mixed-signal ASIC designs using advanced verification methodologies.Key responsibilitiesDevelop and execute comprehensive verification plans for complex mixed-signal ASIC designsCreate and maintain UVM-based SystemVerilog testbenches.Write, debug, and execute test cases to verify functionality, performance, and corner casesPerform block-level and full-chip verification, including simulation, coverage analysis, and regression managementCollaborate closely with design engineers to interpret specifications and define verification requirementsAnalyse and resolve issues discovered during verification and post-silicon validationMentor junior engineers and drive improvements in verification methodologies and infrastructureParticipate in code reviews and contribute to continuous improvement of design and verification best practicesQualifications5+ years’ experience in digital and/or mixed-signal design verificationStrong proficiency in SystemVerilog, UVM, and leading simulation tools (e.g., Synopsys VCS, Cadence Xcelium)Solid understanding of digital design principles, RTL design, and ASIC development flowsExperience with scripting languages (Python, Perl, Shell, etc.)Familiarity with formal verification, assertion-based verification, and coverage-driven verification techniquesExcellent problem-solving skills and attention to detailWhat’s on offerCompetitive base salary plus RSUs and annual bonusA collaborative, innovative working environmentFlexible work options – remote work may be considered for UK-based engineers with full right to work in the UK