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Hardware Design And Failure Analysis Engineer

  • Hardware Design And Failure Analysis Engineer job type Posted on: Oct 26, 2026
  • Hardware Design And Failure Analysis Engineer experience level Saransh Inc
  • Hardware Design And Failure Analysis Engineer employment type San Jose, California
  • Hardware Design And Failure Analysis Engineer employment type Onsite
  • Hardware Design And Failure Analysis Engineer salary Full-time

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Job Title :

Hardware Design And Failure Analysis Engineer

Job Type :

Full-Time

Job Location :

San Jose California United States

Remote :

No

Jobcon Logo Job Description :

Role Overview

  • Education & Experience: B.S. or M.S. in Electrical Engineering, Computer Engineering, Materials Science, or related field with 10+ years of progressive experience in hardware engineering, board design, or system-level failure analysis.
  • High-Speed Hardware Expertise: Well versed in modern system architectures (PCIe Gen4/5/6, DDR4/5, HBM, 56G/112G/224G SerDes, optical transceivers).
  • Power & Signal Integrity: Proven ability to debug complex power distribution network issues/multi-phase VRM transient droop, PMBus/SVID telemetry, switching noise) and high-speed signal integrity anomalies.
  • Supplier Engagement: Hands-on experience directing external silicon suppliers and analytical Laboratories through component-level physical FA.
  • Communication: Strong executive presence with proven capability to articulate complex technical findings to cross-functional leaders and enterprise customers.

Preferred Qualifications

  • Experience leading hardware quality or reliability taskforces for hyperscale cloud service providers (e.g., Microsoft, Meta, Google, AWS).
  • Knowledge of advanced packaging technologies (chiplets, 2.5D/3D ICs, CoWoS) and silicon failure mechanisms.
  • Proficiency in writing custom Python or C automation tools to recreate corner-case/intermittent hardware race conditions.

Jobcon Logo Position Details

Posted:

Oct 26, 2026

Reference Number:

5007-2279

Employment:

Full-time

City:

San Jose

Job Origin:

CIEPAL_ORGANIC_FEED

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Role Overview

  • Education & Experience: B.S. or M.S. in Electrical Engineering, Computer Engineering, Materials Science, or related field with 10+ years of progressive experience in hardware engineering, board design, or system-level failure analysis.
  • High-Speed Hardware Expertise: Well versed in modern system architectures (PCIe Gen4/5/6, DDR4/5, HBM, 56G/112G/224G SerDes, optical transceivers).
  • Power & Signal Integrity: Proven ability to debug complex power distribution network issues/multi-phase VRM transient droop, PMBus/SVID telemetry, switching noise) and high-speed signal integrity anomalies.
  • Supplier Engagement: Hands-on experience directing external silicon suppliers and analytical Laboratories through component-level physical FA.
  • Communication: Strong executive presence with proven capability to articulate complex technical findings to cross-functional leaders and enterprise customers.

Preferred Qualifications

  • Experience leading hardware quality or reliability taskforces for hyperscale cloud service providers (e.g., Microsoft, Meta, Google, AWS).
  • Knowledge of advanced packaging technologies (chiplets, 2.5D/3D ICs, CoWoS) and silicon failure mechanisms.
  • Proficiency in writing custom Python or C automation tools to recreate corner-case/intermittent hardware race conditions.

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