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IC Packaging Design Engineer

  • IC Packaging Design Engineer job type Posted on: Nov 02, 2026
  • IC Packaging Design Engineer experience level Canvendor
  • IC Packaging Design Engineer employment type Chandler, Arizona
  • IC Packaging Design Engineer employment type Onsite
  • IC Packaging Design Engineer salary Full-time

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Job Title :

IC Packaging Design Engineer

Job Type :

Full-Time

Job Location :

Chandler Arizona United States

Remote :

No

Jobcon Logo Job Description :

Job Title : IC Packaging Design EngineerJob Location : Chandler, AZ/ Hillsboro, OR (Onsite)Duration : 12+ MonthsJob Description: As an IC Packaging Design Engineer, you'll work on physical design and layout of IC packages, driving substrate design and SI/PI-aware implementation for high-performance semiconductor products. You'll collaborate closely with cross-functional teams to ensure designs meet performance, manufacturability, yield, and reliability targets.What You'll DoPerform physical design and layout of IC packagesExecute substrate design and layoutImplement SI/PI-aware design practicesDesign for performance, manufacturability, yield, and reliability (DFM/DFY/DFR)Ensure design rule compliance across all deliverablesUse Siemens (Mentor) Xpedition (XPD) or Cadence Allegro/Advanced Package Designer (APD/SiP) for design executionWhat You BringBachelor's or Master's degree in Electrical/Electronics EngineeringSenior-level: ~10+ years in IC packaging / package design, ORMid-level: 4–6+ years (MS) or 6+ years (BS) in IC packaging / package designStrong hands-on experience in Siemens Xpedition (XPD) or Cadence Allegro/APD (SiP)Proven experience in substrate design, SI/PI-aware implementation, and design rule compliance

Jobcon Logo Position Details

Posted:

Nov 02, 2026

Reference Number:

10440_4479369851

Employment:

Full-time

City:

Chandler

Job Origin:

APPCAST_CPC

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Job Title : IC Packaging Design EngineerJob Location : Chandler, AZ/ Hillsboro, OR (Onsite)Duration : 12+ MonthsJob Description: As an IC Packaging Design Engineer, you'll work on physical design and layout of IC packages, driving substrate design and SI/PI-aware implementation for high-performance semiconductor products. You'll collaborate closely with cross-functional teams to ensure designs meet performance, manufacturability, yield, and reliability targets.What You'll DoPerform physical design and layout of IC packagesExecute substrate design and layoutImplement SI/PI-aware design practicesDesign for performance, manufacturability, yield, and reliability (DFM/DFY/DFR)Ensure design rule compliance across all deliverablesUse Siemens (Mentor) Xpedition (XPD) or Cadence Allegro/Advanced Package Designer (APD/SiP) for design executionWhat You BringBachelor's or Master's degree in Electrical/Electronics EngineeringSenior-level: ~10+ years in IC packaging / package design, ORMid-level: 4–6+ years (MS) or 6+ years (BS) in IC packaging / package designStrong hands-on experience in Siemens Xpedition (XPD) or Cadence Allegro/APD (SiP)Proven experience in substrate design, SI/PI-aware implementation, and design rule compliance

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