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Principal Analog Mixed Signal Design Engineer

  • ... Posted on: Dec 11, 2024
  • ... MINDPROSOLUTIONS
  • ... Westlake Village, California
  • ... Salary: Not Available
  • ... Full-time

Principal Analog Mixed Signal Design Engineer   

Job Title :

Principal Analog Mixed Signal Design Engineer

Job Type :

Full-time

Job Location :

Westlake Village California United States

Remote :

No

Jobcon Logo Job Description :

Role: Principal Analog Mixed-Signal Design Engineer - RF/SiPho/TIA/CMOS/SiGe
Location: Westlake Village, CA (Hybrid )
Job Type: Full Time Permanent
Domain: Engineering / Architecture
Client: Marvell Semiconductor Inc.
Salary: USD $145,300 $215,010 / yr
Must have:
  • This is a very hard to fill Analog Engineer position so they must have:
  • Bachelor's degree in Electrical Engineering in the areas of design of high-performance RF/Analog Receiver/TIA design and 10 - 15 years experience Or MSc EE Or PhD EE with 5+ years of experience in the areas of design of high-performance RF/Analog Receiver/TIA design.
Job Description:

EE with 5+ years of experience in the areas of design of high-performance RF/Analog Receiver/TIA design.

  • Proven experience in IC design including chip tape-out AND lab evaluation of receiver design working in the industry).
  • Solid experience in.
    • Using EDA CAD tools
    • Performing Analog Custom Layout
  • Experience in measuring IC performance and debug of design to correlate simulations to measurements
  • Deep understanding of fundamentals, including:
    • Detailed transistor level design
    • Device physics
    • Control/Feedback loop stability analysis
  • Direct project experience in at least one of the following areas is a plus:
    • AGC loop design
    • High precision analog circuits (Including linear regulators, current sensors, bandgaps and DAC/ADC)
    • Experience in CTLE design
  • Experience in Package-System integration issues desired
  • Project experience in using different technologies. (SiGe BiCMOS is a plus)
  • A team-player
  • Experience in the following is a strong plus:
    • Overseeing and mentoring junior circuit designers
    • Experience as chip lead with success in silicon
    • Experience in taking chips to mass production
    • Ability to translate chip level specifications into architecture
  • Strong communication, presentation and documentation skills.

Jobcon Logo Position Details

Posted:

Dec 11, 2024

Employment:

Full-time

Salary:

Not Available

Snaprecruit ID:

SD-CIE-ac737522f63c9bb6cfc52e5df207f2303a4557b20bab2b2db4d579301e6b6ea3

City:

Westlake Village

Job Origin:

CIEPAL_ORGANIC_FEED

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Role: Principal Analog Mixed-Signal Design Engineer - RF/SiPho/TIA/CMOS/SiGe
Location: Westlake Village, CA (Hybrid )
Job Type: Full Time Permanent
Domain: Engineering / Architecture
Client: Marvell Semiconductor Inc.
Salary: USD $145,300 $215,010 / yr
Must have:
  • This is a very hard to fill Analog Engineer position so they must have:
  • Bachelor's degree in Electrical Engineering in the areas of design of high-performance RF/Analog Receiver/TIA design and 10 - 15 years experience Or MSc EE Or PhD EE with 5+ years of experience in the areas of design of high-performance RF/Analog Receiver/TIA design.
Job Description:

EE with 5+ years of experience in the areas of design of high-performance RF/Analog Receiver/TIA design.

  • Proven experience in IC design including chip tape-out AND lab evaluation of receiver design working in the industry).
  • Solid experience in.
    • Using EDA CAD tools
    • Performing Analog Custom Layout
  • Experience in measuring IC performance and debug of design to correlate simulations to measurements
  • Deep understanding of fundamentals, including:
    • Detailed transistor level design
    • Device physics
    • Control/Feedback loop stability analysis
  • Direct project experience in at least one of the following areas is a plus:
    • AGC loop design
    • High precision analog circuits (Including linear regulators, current sensors, bandgaps and DAC/ADC)
    • Experience in CTLE design
  • Experience in Package-System integration issues desired
  • Project experience in using different technologies. (SiGe BiCMOS is a plus)
  • A team-player
  • Experience in the following is a strong plus:
    • Overseeing and mentoring junior circuit designers
    • Experience as chip lead with success in silicon
    • Experience in taking chips to mass production
    • Ability to translate chip level specifications into architecture
  • Strong communication, presentation and documentation skills.

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