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Senior Analog RF Layout Engineer for SoC IP & Tape-out

  • Job type Posted on: May 20, 2026
  • Experience level Capgemini
  • Employment type San Francisco, Texas
  • Remote status Salary: $203,800 per year
  • Employment type Onsite
  • Salary Full-time
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Job Title :

Senior Analog RF Layout Engineer for SoC IP & Tape-out

Job Type :

Full-time

Job Location :

San Francisco Texas United States

Remote :

No

Jobcon Logo Job Description :

View Full Description
A leading global design firm is seeking an experienced Analog Layout Engineer to support advanced semiconductor nodes in San Francisco, CA. The role requires expertise in analog and RF layout design with a focus on complex modules like SerDes and ADC/DACs. Candidates should have a Bachelor's in Electrical Engineering or related field and 6+ years experience in the area. The position offers a competitive compensation range between $97,700 and $203,800 per year along with comprehensive benefits including medical coverage and paid time off. #J-18808-Ljbffr

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Jobcon Logo Position Details

Posted:

May 20, 2026

Reference Number:

14660_8508AFFFA34C39643519B2672D6F3147

Employment:

Full-time

Salary:

Not Available

City:

San Francisco

Job Origin:

APPCAST_CPC

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A leading global design firm is seeking an experienced Analog Layout Engineer to support advanced semiconductor nodes in San Francisco, CA. The role requires expertise in analog and RF layout design with a focus on complex modules like SerDes and ADC/DACs. Candidates should have a Bachelor's in Electrical Engineering or related field and 6+ years experience in the area. The position offers a competitive compensation range between $97,700 and $203,800 per year along with comprehensive benefits including medical coverage and paid time off. #J-18808-Ljbffr

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