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Senior Member of Technical Staff - ASIC Engineering

  • ... Posted on: Apr 20, 2026
  • ... Exo
  • ... Santa Clara County, California
  • ... Salary: Not Available
  • ... Full-time

Senior Member of Technical Staff - ASIC Engineering   

Job Title :

Senior Member of Technical Staff - ASIC Engineering

Job Type :

Full-time

Job Location :

Santa Clara County California United States

Remote :

No

Jobcon Logo Job Description :

Job Description

Job Title: Senior MTS, ASIC Engineering


Reports to: Head of ASIC Group


Job Location: Headquarters, CA



Exo Imaging is looking for an experienced mixed signal designer to join a major effort to develop next generation Medical Ultrasound Imagers.Work will include design and verification of signal processing modules, interfaces, control blocks and other functions on ASICs interfaced with FPGAs and other circuits. The ideal candidate will be self-motivated, prepared to challenge the status quo and work with a seasoned team to develop next generation advanced solutions.



Job Requirements:


  • MSEE with ~ 8+ years of relevant experience
  • 5 years+ experience in successful commercial product development
  • Experience with key steps in design, simulation, verification, layout management, chip tapeout
  • Expereince in circuit debug & lab bring-up of mixed signal ICs.
  • Ability to work with cross functional groups
  • Ability to communicate effectively
  • Proven ability to lead or work within design teams in developing leading edge products, with deep skill set in ASIC and Systems development
  • Ability to implement and execute effectively
  • In depth knowledge of industry best practices
  • Possess strong interpersonal skills including the ability to influence senior level decision makers within the company.

Job Responsibilities (but not limited to):

  • Design circuits personally.
  • Debug and characterize circuits in the lab.
  • Develop complex and or high precision circuits in CMOS technologies.
  • Supervise layout personnel and laboratory technicians.
  • Perform reviews of designs with worst case analysis
  • Detailed knowledge of ASIC layout tools such as Cadence Design Systems and ability to supervise layout of Integrated circuits



Salary Range: $190K - $250K

View Full Description

Jobcon Logo Position Details

Posted:

Apr 20, 2026

Reference Number:

17469eb4835e302c

Employment:

Full-time

Salary:

Not Available

City:

Santa Clara County

Job Origin:

ziprecruiter

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Job Description

Job Title: Senior MTS, ASIC Engineering


Reports to: Head of ASIC Group


Job Location: Headquarters, CA



Exo Imaging is looking for an experienced mixed signal designer to join a major effort to develop next generation Medical Ultrasound Imagers.Work will include design and verification of signal processing modules, interfaces, control blocks and other functions on ASICs interfaced with FPGAs and other circuits. The ideal candidate will be self-motivated, prepared to challenge the status quo and work with a seasoned team to develop next generation advanced solutions.



Job Requirements:


  • MSEE with ~ 8+ years of relevant experience
  • 5 years+ experience in successful commercial product development
  • Experience with key steps in design, simulation, verification, layout management, chip tapeout
  • Expereince in circuit debug & lab bring-up of mixed signal ICs.
  • Ability to work with cross functional groups
  • Ability to communicate effectively
  • Proven ability to lead or work within design teams in developing leading edge products, with deep skill set in ASIC and Systems development
  • Ability to implement and execute effectively
  • In depth knowledge of industry best practices
  • Possess strong interpersonal skills including the ability to influence senior level decision makers within the company.

Job Responsibilities (but not limited to):

  • Design circuits personally.
  • Debug and characterize circuits in the lab.
  • Develop complex and or high precision circuits in CMOS technologies.
  • Supervise layout personnel and laboratory technicians.
  • Perform reviews of designs with worst case analysis
  • Detailed knowledge of ASIC layout tools such as Cadence Design Systems and ability to supervise layout of Integrated circuits



Salary Range: $190K - $250K

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