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Senior Physical Design Engineer

  • Senior Physical Design Engineer job type Posted on: Nov 07, 2026
  • Senior Physical Design Engineer experience level Mirafra Technologies
  • Senior Physical Design Engineer employment type United, West Virginia
  • Senior Physical Design Engineer employment type Onsite
  • Senior Physical Design Engineer salary Full-time

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Job Title :

Senior Physical Design Engineer

Job Type :

Full-Time

Job Location :

United West Virginia United States

Remote :

No

Jobcon Logo Job Description :

Job Description

Job Title: Physical Design Engineer

\n

Job Summary:

\n

We are seeking an experienced Physical Design Engineer to lead and implement physical

\n

design across a range of high-volume consumer devices and satellite-related projects. This role

\n

involves end-to-end physical implementation, collaboration with cross-functional teams, and

\n

ownership of physical design methodologies and timing closure.

\n

Key Responsibilities:

\n

• Lead and implement physical design for chips across process nodes ranging from 40nm

\n

to 7nm

\n

• Perform block-level and top-level physical implementation

\n

• Drive floorplanning activities including multi-power domain design, power grid (PG)

\n

planning, block shaping, and clock tree implementation

\n

• Interface with internal and external stakeholders, including Design, IP, and Library teams

\n

• Conduct physical verification at block and chip level

\n

• Perform static and dynamic IR drop analysis, as well as signal and power

\n

electromigration (EM) checks

\n

• Develop methodologies and flows for physical design and timing closure

\n

• Collaborate with Synthesis, STA, and RTL design teams to meet physical

\n

implementation and power intent requirements

\n

• Support ESD, IO padring, and analog integration; experience with packaging types such

\n

as flip-chip and WLCSP is preferred

\n

Required Qualifications:

\n

• Bachelor’s degree in Electrical Engineering with 8+ years of experience, OR Master’s

\n

degree in Electrical Engineering with 10+ years of experience

\n

• Multiple tapeout experience

\n

• Extensive hands-on experience with tools such as Innovus, VCLP, Formality, LEC,

\n

Calibre, and timing closure tools

\n

• Strong expertise with Cadence Innovus (required)

\n

• TCL scripting experience (required); Python is a plus

\n

• Knowledge of physical design flows and methodologies

Jobcon Logo Position Details

Posted:

Nov 07, 2026

Reference Number:

ccfdde40aac4ba5f

Employment:

Full-time

City:

United

Job Origin:

ziprecruiter

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Job Description

Job Title: Physical Design Engineer

\n

Job Summary:

\n

We are seeking an experienced Physical Design Engineer to lead and implement physical

\n

design across a range of high-volume consumer devices and satellite-related projects. This role

\n

involves end-to-end physical implementation, collaboration with cross-functional teams, and

\n

ownership of physical design methodologies and timing closure.

\n

Key Responsibilities:

\n

• Lead and implement physical design for chips across process nodes ranging from 40nm

\n

to 7nm

\n

• Perform block-level and top-level physical implementation

\n

• Drive floorplanning activities including multi-power domain design, power grid (PG)

\n

planning, block shaping, and clock tree implementation

\n

• Interface with internal and external stakeholders, including Design, IP, and Library teams

\n

• Conduct physical verification at block and chip level

\n

• Perform static and dynamic IR drop analysis, as well as signal and power

\n

electromigration (EM) checks

\n

• Develop methodologies and flows for physical design and timing closure

\n

• Collaborate with Synthesis, STA, and RTL design teams to meet physical

\n

implementation and power intent requirements

\n

• Support ESD, IO padring, and analog integration; experience with packaging types such

\n

as flip-chip and WLCSP is preferred

\n

Required Qualifications:

\n

• Bachelor’s degree in Electrical Engineering with 8+ years of experience, OR Master’s

\n

degree in Electrical Engineering with 10+ years of experience

\n

• Multiple tapeout experience

\n

• Extensive hands-on experience with tools such as Innovus, VCLP, Formality, LEC,

\n

Calibre, and timing closure tools

\n

• Strong expertise with Cadence Innovus (required)

\n

• TCL scripting experience (required); Python is a plus

\n

• Knowledge of physical design flows and methodologies

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