Position Details
Senior RTL Design Engineer – High-Performance SoC/FPGA Apply
A leading semiconductor company in San Jose is seeking a Senior Design Engineer to drive the development of high-speed interfaces and digital components. This role involves RTL design, timing constraint management, and mentoring other engineers. Applicants should have a degree in Electrical Engineering and a passion for digital design. The position offers opportunities for continuous technical innovation and a collaborative environment. #J-18808-Ljbffr
