Job Title: Microarchitect & RTL Design Engineer

Location: Santa Clara, CA

About the Role: We are seeking a seasoned Microarchitect and RTL Design Engineers with a strong background in microarchitecture and RTL coding. The ideal candidate will play a key role in shaping our technology portfolio, bringing expertise and creativity to our solutions

Key Responsibilities:

• Design and develop microarchitectures for a set of highly configurable IPs
• Microarchitecture and RTL coding ensuring optimal performance, power, area
• Collaborate with software teams to define configuration requirements, verification collaterals etc.
• Work with verification teams on assertions, test plans, debug, coverage etc.

Qualifications:

• BS, MS in Electrical Engineering, Computer Engineering or Computer Science
• 8+ years and current hands-on experience in microarchitecture and RTL development
• Proficiency in Verilog, System Verilog
• Familiarity with industry-standard EDA tools and methodologies
• Experience with large high-speed, pipelined, stateful designs, and low power designs
• In-depth understanding of on-chip interconnects and NoCs
• Experience within ARM ACE/CHI or similar coherency protocols
• Experience designing IP blocks for caches, cache coherency, memory subsystems, interconnects and NOCs
• Familiarity with RAS designs, QoS in fabrics, PCIe/IO is a plus
• Experience with modern programming languages like Python is a plus
• Excellent problem-solving skills and attention to detail
• Strong communication and collaboration skills