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Validation Engineer (Memory)

  • Job type Posted on: Jul 19, 2026
  • Experience level Infobahn Softworld Inc
  • Employment type Austin, Texas
  • Employment type Onsite
  • Salary Full-time

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Job Title :

Validation Engineer (Memory)

Job Type :

Full-time

Job Location :

Austin Texas United States

Remote :

No

Jobcon Logo Job Description :

Job Title Validation Engineer Work Location Austin, TX Experience and Education Bachelors in Electrical Engineering or Computer Engineering with 0-2 years of related experience or Masters plus at least 2 years directly related experience (an advanced degree will be considered a plus. Responsibilities Execute electrical, functional, & system tests of DDR5 and LPDDR5x memory sub-system test plans as part of a post silicon platform engineering team using hardware and software validation tools, oscilloscopes, and logic analyzers. Develop technical test plans and tools to support platform level silicon bring-up and the validation execution of DDR5 and LPDDR5x memory subsystem. Knowledge of PC architectures and system technologies. Requires experience and demonstrated technical expertise in the debug of processor & PC platform I/O interfaces. #J-18808-Ljbffr

Jobcon Logo Position Details

Posted:

Jul 19, 2026

Reference Number:

14660_CCC1737D676B80975D1EF8B484392A5D

Employment:

Full-time

Salary:

Not Available

City:

Austin

Job Origin:

APPCAST_CPC

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Job Title Validation Engineer Work Location Austin, TX Experience and Education Bachelors in Electrical Engineering or Computer Engineering with 0-2 years of related experience or Masters plus at least 2 years directly related experience (an advanced degree will be considered a plus. Responsibilities Execute electrical, functional, & system tests of DDR5 and LPDDR5x memory sub-system test plans as part of a post silicon platform engineering team using hardware and software validation tools, oscilloscopes, and logic analyzers. Develop technical test plans and tools to support platform level silicon bring-up and the validation execution of DDR5 and LPDDR5x memory subsystem. Knowledge of PC architectures and system technologies. Requires experience and demonstrated technical expertise in the debug of processor & PC platform I/O interfaces. #J-18808-Ljbffr

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