Analog and RF Layout Engineer

Analog and RF Layout Engineer As a Senior Analog / RF IC Layout Engineer , you will play a critical role in designing and enabling cutting‑edge high‑speed mixed‑signal silicon for next‑generation technologies. You will collaborate with world‑class design, verification, and process teams to deliver robust, scalable layouts in advanced FinFET nodes that power high‑performance products across industries. Your Role Lead and contribute to the physical layout of complex, high‑speed analog and RF mixed‑signal blocks from concept through tape‑out Develop and implement block‑level and chip‑level layouts in advanced CMOS FinFET technologies (7nm and below) Partner closely with analog, RF, and digital designers to ensure layout quality, performance, and manufacturability Own floor planning, block‑level routing, and top‑level chip assembly activities for complex integrated circuits Apply best‑in‑class layout techniques to address signal integrity, electromigration, thermal awareness, and high‑speed performance Drive layout reviews, layout verification, and design rule compliance using industry‑standard EDA tools Mentor and guide junior engineers while promoting quality, collaboration, and engineering best practices Your skills and experience 6+ years of experience in Analog and RF IC layout for high‑speed applications Hands‑on experience developing and leading complex layouts at both block and full‑chip levels in advanced FinFET technologies (7nm and below) Strong expertise using industry‑standard EDA tools from Cadence, Mentor, and Synopsys Proven experience with layout of high‑performance analog mixed‑signal blocks , such as: High‑speed transceivers CMOS drivers High‑speed data converters PLLs Solid understanding of floorplanning, routing, layer generation, thermal‑aware layout practices , and electromigration considerations Compensation The base compensation range for this role in the posted location is: $79,750 to $174,000 per year. Benefits Paid time off based on employee grade (A-F), e.g., Vacation: 12‑25 days, Company paid holidays, Personal Days, Sick Leave Medical, dental, and vision coverage (or provincial healthcare coordination in Canada) Retirement savings plans (e.g., 401(k) in the U.S., RRSP in Canada) Life and disability insurance Employee assistance programs Other benefits as provided by local policy and eligibility Important Notice Compensation (including bonuses, commissions, or other forms of incentive pay) is not considered earned, vested, or payable until it becomes due under the terms of applicable plans or agreements and is subject to Capgemini’s discretion, consistent with applicable laws. The Company reserves the right to amend or withdraw compensation programs at any time, within the limits of applicable legislation. Equal Opportunity Employer Capgemini is an Equal Opportunity Employer encouraging inclusion in the workplace. All qualified applicants will receive consideration for employment without regard to race, national origin, gender identity/expression, age, religion, disability, sexual orientation, genetics, veteran status, marital status, or any other characteristic protected by law. Job Details Location: San Francisco, CA, US Contract Type: Permanent Posted on: May 4, 2026 #J-18808-Ljbffr