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Analog Designer

  • Analog Designer job type Posted on: Nov 04, 2026
  • Analog Designer experience level American IT Systems
  • Analog Designer employment type Austin, Texas
  • Analog Designer employment type Onsite
  • Analog Designer salary CTC

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Job Title :

Analog Designer

Job Type :

Contract

Job Location :

Austin Texas United States

Remote :

No

Jobcon Logo Job Description :

The Team needs a person very familiar with all aspects of SERDES PHYs and capable of supporting pre-silicon integration of various kinds of these IP into all products, as well as providing post-silicon support across a range of test scenarios.

THE PERSON:

  • You have strong PHY background in SERDES or Memory PHYs.
  • You are a team player who has excellent communication skills and experience collaborating with other engineers.
  • You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.

KEY RESPONSIBILITIES:

    • Support pre-silicon integration and post-silicon support of SERDES PHY IP.
    • Support electrical analyses for power, signal, and clock integrity to ensure that SERDES IP operate successfully across many SoC environments.
    • Support post-silicon teams for production screening, characterization, compliance, and functional testing of 3rd Party IP.

PREFERRED EXPERIENCE:

    • SERDES or memory PHY design experience of some kind
    • Understanding of power noise generation and sensitivity
    • Understanding of the basics of signal integrity, specifically termination impedance, characteristic impedance, transmission lines
    • Knowledge of clock distribution and clock specifications like jitter, DCD, etc. a plus.
    • Some lab experience from functional validation or electrical testing/compliance of SERDES PHYs.

ACADEMIC CREDENTIALS:

    • Bachelors or Masters degree in Electrical or Computer Engineering

Jobcon Logo Position Details

Posted:

Nov 04, 2026

Reference Number:

2094-44639

Employment:

CTC

City:

Austin

Job Origin:

CIEPAL_ORGANIC_FEED

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The Team needs a person very familiar with all aspects of SERDES PHYs and capable of supporting pre-silicon integration of various kinds of these IP into all products, as well as providing post-silicon support across a range of test scenarios.

THE PERSON:

  • You have strong PHY background in SERDES or Memory PHYs.
  • You are a team player who has excellent communication skills and experience collaborating with other engineers.
  • You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.

KEY RESPONSIBILITIES:

    • Support pre-silicon integration and post-silicon support of SERDES PHY IP.
    • Support electrical analyses for power, signal, and clock integrity to ensure that SERDES IP operate successfully across many SoC environments.
    • Support post-silicon teams for production screening, characterization, compliance, and functional testing of 3rd Party IP.

PREFERRED EXPERIENCE:

    • SERDES or memory PHY design experience of some kind
    • Understanding of power noise generation and sensitivity
    • Understanding of the basics of signal integrity, specifically termination impedance, characteristic impedance, transmission lines
    • Knowledge of clock distribution and clock specifications like jitter, DCD, etc. a plus.
    • Some lab experience from functional validation or electrical testing/compliance of SERDES PHYs.

ACADEMIC CREDENTIALS:

    • Bachelors or Masters degree in Electrical or Computer Engineering

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